The present invention relates generally to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device capable of decreasing contact resistance, to thereby improve characteristics and device reliability, and a method for manufacturing the same.
In a semiconductor device such as a dynamic random access memory (DRAM), landing plugs serve as a type of contact plugs that electrically connect source areas and drain areas of transistors with bit lines and capacitors. As the size of the semiconductor device gradually decreases and the level of integration is increased, there is a corresponding reduction in contact area, increase in contact resistance, and decrease in operation current. Due to this fact, the write recovery time (tWR) and refresh characteristics of the semiconductor device deteriorate, inevitably leading to degradation in the performance of the semiconductor device.
As a semiconductor design rule decreases, because the contact area of landing plugs is limited to the area between gates, a contact margin between the landing plugs and bit line contact plugs or between the landing plugs and storage node contact plugs decreases. This is problematic as it results in a gradual increase in contact resistance.
Under these situations, in order to decrease the contact resistance and increase the operation current of a semiconductor device, methods of increasing the concentration of the impurities doped in source areas and drain areas, increasing the concentration of the impurities doped in a polysilicon layer serving as a contact substance, and conducting an rapid thermal annealing (RTA) process have been adopted in the art. However, in such methods, leakage current is caused in the gates, and refresh characteristics deteriorate. Therefore, a method for decreasing contact resistance without causing leakage current or undergoing deterioration of refresh characteristics is required in the art.